Project Details
Abstract
A V-band frequency doubler and tripler circuits are being developed and designed in this project for 60
GHz wireless communication based on the experiences of development of high-frequency semiconductor
devices and the technique for microwave/millimeter-wave circuit design in Department of Electronics, Chang
Gung University. To achieve a V-band communication system integrated transmitter and receiver chips, the
performances of the multiplier circuits must be investigated with wide bandwidth, high conversion efficiency,
low output phase noise, and high output power level. The circuit topology of the proposed multipliers is
designed by using a conventional differential-type BPSK modulator. By investigating the second- and
third-order harmonic signals with different biases on transistor, a multiplier circuit including a function of
BPSK modulation which can directly generate a high data rate modulated signal will be implemented. The
wide bandwidth and high fundamental signal suppression characteristics also can be achieved by using the
technique of differential phase compensation with an input broadband balun. In order to provide a local
oscillation signal to the multiplier circuits, a voltage-controlled oscillator or an injection-locked oscillator
will be arranged for a direct frequency conversion with digital signal modulation.
The frequency tripler MMICs with BPSK modulation and the maximum data rate of 2.5 Gbps has been
designed and fabricated by using PHEMT and CMOS processes at 60 GHz band. Considering that a
millimeter-wave chip integration including the improved passive and active components can reduce the
high-frequency signal loss and dc power consumption, a subsystem integrated amplifier, oscillator, and
modulator circuits is being developed by using advanced CMOS technique. The millimeter-wave broadband
frequency doubler and tripler with 20 GHz wide locking-range injection-locked oscillator will be
successfully implemented and operated having the characteristics of a bandwidth over 15 GHz and high
output saturation power of -5 dBm. The digital data rate can be increased over 3 Gbps.
Project IDs
Project ID:PB10109-0079
External Project ID:NSC101-2218-E182-007
External Project ID:NSC101-2218-E182-007
Status | Finished |
---|---|
Effective start/end date | 01/08/12 → 31/07/13 |
Keywords
- Frequency doubler/tripler
- microwave broadband circuit
- injection-locked oscillator
- millimeter-wave application
- BSPK modulation
- CMOS process
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