Crosstalk Constrained Optimal Layout Design for High Speed and High Desity VLSI Circuits

Lee, J. Yen (PI)

Department of Mechanical Engineering

Project: National Science and Technology Council › National Science and Technology Council Academic Grants

Project IDs

Project ID:PB9009-0967
External Project ID:NSC90-2215-E182-002

Status	Finished
Effective start/end date	01/08/01 → 31/07/02

Keywords

Integrated circuit design
VLSI
Crosstalk noise
Optimal design

Access Project

https://www.grb.gov.tw/search/planDetail?id=666159