Development and Design of High Efficient, Low Power Digital Edge Computing Convolution Neural Network Chip

Wey, I-Chyn (PI)

Department of Electrical Engineering

Project: National Science and Technology Council › National Science and Technology Council Academic Grants

Abstract

本研究計畫可對於IC 設計業界提供邊緣運算AI晶片設計、低功率AI晶片設計，IMC內存運算電路晶片設計方案、讓台灣在前瞻製程之AI IC設計領域維持競爭地位，亦可提供相關AI IC設計經驗服務業界。透過計畫參與，除了培育學生關鍵IC設計經驗與AI晶片設計能力，亦可栽培國內AI IC設計領域具有潛力的研究生，替國內IC設計產業界培植人才。

Project IDs

Project ID:PB11007-5658
External Project ID:MOST110-2221-E182-065

Status	Finished
Effective start/end date	01/08/21 → 31/07/22

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https://www.grb.gov.tw/search/planDetail?id=13892513

Development and Design of High Efficient, Low Power Digital Edge Computing Convolution Neural Network Chip

Project Details

Abstract

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