Development of High-K Tb/sub 2/O/sub 3/ Dielectric in the Flash Memory and Thin Film Transistor Applications

The development of semiconductor industry in the twenty-one centuries improves the human life and makes everything possible. In the world, the insight of human was paid for the semiconductor industry to improve the quality of human life. The application of flash memory was spread out the portable electronic product, including cellular phone, digital camera, USB data traveler and so on. In order to need for market, the large capacity, high speed and low operation voltage of flash memory require more one product. The application of thin-film transistor (TFT) was spread out the liquid-crystal display (LCD) of electronic product, such as digital camera, projector, LCD and so on. The speed and size of LCD are mainly affected by TFT. The reliability of high-k Tb2O3 dielectric flash memory and LTPS (low-temperature polysilicon) TFT is very important. The reliability of data retention, P/E cycle time and endurance for flash memory device and hot carrier, negative bias temperature and positive bias temperature for TFT device. This project was concentrated on the development of high-k Tb2O3 dielectric in the flash memory and LTPS TFT applications. New high-k Tb2O3 dielectric materials will apply to the flash memory and LTPS TFT devices of semiconductor for integration, reasonable, and commercialization. This project was divided into three years: 1. Development of high-k terbium oxide gate dielectrics for flash memories applications, they will possess high P/E speed, long data retention, high P/E cycles, and small gate and drain disturb. 2. Development of high-k terbium oxide gate dielectrics for LTPS TFT devices applications, they will possess high Ion/Ioff ratio, high effective mobility, and excellent reliability. 3. The reliability mechanism of high-k terbium oxide is studied for flash memory and LTPS TFT. The reliability mechanism of data retention, endurance and gate/drain disturb for flash memory device and hot carrier, negative bias temperature and positive bias temperature for LTPS TFT device is investigated.

Project ID:PB9902-2190
External Project ID:NSC98-2221-E182-056-MY3