Project Details
Abstract
In the last decade, the widespread of handheld electronic products and the emerging 5G communication have made the applications of random number generator (RNG) important, including of electrical office, cloud computing, and online financial transactions, the digital signature and information security. Therefore, the fast and secure key generation for meeting the great need is required.
The purpose of this project is to integrate a true random number seed generator (TRNG) and pseudo random number generator (PRNG) in one single chip as a mixed RNG with high throughput rates and good unpredictability. In this project, on the one hand, we design a supply noise sensitivity compensation circuit in voltage control oscillator (VCO) of phase-locked loop to generate true random seed for building a TRNG with good unpredictability. On the other hand, we propose a series of hardware-efficient PRNGs based on multiple recursive generation (MRG). In this project, we want to compromise these two types of RNGs that the proposed RNGs can generate fast random numbers with good unpredictability.
We will work on the following areas based on the foundations laid in our previous project. First, design a supply noise sensitivity reduction circuit in voltage control oscillator (VCO) to generate true random seed for initialization and reseeding of PRNG. Second, we find new parameters suitable for hardware implementation and design a programmable barrel shifter according to these new parameters. Third, develop a parity prediction mechanism in the proposed hardware-efficient PRNGs. build a next-state construction to generate random numbers in high throughput rate with true random seed in order to enhance the unpredictability. Most importantly, the proposed mixed random number generator can be easily integrated in single IC for 5G communication application.
Project IDs
Project ID:PB10507-1876
External Project ID:MOST105-2221-E182-076
External Project ID:MOST105-2221-E182-076
Status | Finished |
---|---|
Effective start/end date | 01/08/16 → 31/07/17 |
Keywords
- Multiple recursive generator
- NIST SP800-22
- parity prediction
- phase locked loop
- pseudo random number generator
- sensitivity reduction circuit
- true random number generator
- 5G communication
Fingerprint
Explore the research topics touched on by this project. These labels are generated based on the underlying awards/grants. Together they form a unique fingerprint.