Improvement of the Characteristics of Soi and Nano-Crystal Memory Devices by Plasma Immersion Ion Implantation

Silicon-on-Insulator (SOI) device can improve the parasitic capacitance, suppress the short channel effect and leakage current. Use of fully depleted SOI substrates provides advantages such as reduced junction capacitance, immunity to radiation and latch-up, and improved performance over bulk Si devices. A novel approach of SOI fabrication has been proposed. Impurities pre-implantation technique is expected to be capable of improve SOI film uniformity. Wafer bonding is another important technique to achieve high quality SOI films. The surface energy strength of bonding wafer is analyzed by PIII impurity incorporation. The tunnel oxide of nano-crystal memory is passivated by PIII plasma treatment as well. In this project, we propose three processes and measurement methods to improve SOI film quality and the characteristics of nano-crystal memory devices. (1) Surface Roughness Improvements by Impurities Pre-implantation： Diffusion and gathering of hydrogen are dependent on the location of crystal damage. We could obtain sharper hydrogen distribution by pre-implant ions (e.g. Si, Ge, Ar, et al. ) before hydrogen PIII process, and then improve the film uniformity. (2) Surface Energy (bonding strength) Enhancement by PIII Technique： The PIII process is proposed to modify the surface energy of bonding wafer. Different species plasma treatment will induce various types of chemical bonding on the wafer surface. The key point of this topic is to analyze the effects of plasma treatment on surface energy. (3) Nano-crystal Passivation by PIII Impurity Incorporation： The PIII passivated process is utilized to characterize the properties of nano-crystal memory devices. Charge storage layers such as nano-Si, SiGe or high-k materials as trapping centers are considered to observe the effects of plasma passivation on nano-crystal materials.

Project ID:PB9706-2042
External Project ID:NSC97-2623-7182-001-NU