Novel Asymmetry Nanocrystal Nonvolatile Memory

Recently, high-k dielectrics such as Gd2O3 have been proposed as the nanocrystal (NC) memories which exhibit superior memory characteristics. The conventional floating gate flash memory with multi-level cell (MLC) operation has some problems such as reliability issue, slow operation speed, and high power consumption. In this project, we propose a novel asymmetric memory structure to achieve the MLC operation. By using direct read, the power consumption, time-consuming, and complicated circuit of reverse read method can be effectively reduced, leading to the increase of chip density per wafer. Besides, we also propose a novel Graphene nanodisk memory and can be applied into the asymmetric memory structure. There are two parts of this project: 1. The asymmetric metal/high-k nanocrystal memory structure will be fabricated and measured. By using a suitable bias for single side injection, the MLC operation can be achieved owing to the different nanaocrystal numbers and energy levels. The 2nd bit effect can be suppressed because of the different location of nanocrystals at two sides. We also fabricate the Graphene nanodisk memory by Au nanocrystal hard mask. The process will be optimized and the electrical properties and reliability will be measured. 2. Based on the fabricated Graphene nanodisk memory, the asymmetric Graphene nanodisk/high-k nanocrystal memory structure will be fabricated and measured. This will be analyzed and compared to the asymmetric metal/high-k nanocrystal memory structure and the physical mechanism will be established. Furthermore, the Au/Graphene nanodisk/high-k nanocrystal memory structure will be fabricated and the MLC operation will be realized.

Project ID:PB10108-2811
External Project ID:NSC101-2221-E182-053