Strain Effect and Self-Heating Effect on Advanced High-Power Gan Devices and Its and Flip-Chip Packaging

Since energy-saving and green-energy become more attention, high power GaN devices become the focus of public attention. GaN has attracted much attention due to their several special properties: fine thermal stability, high breakdown voltage, high electron velocity, and high current density from piezoelectric effect, and so on. The on-resistance of GaN HEMT is only 2% of silicon transistor. GaN has be considerable potential in high-speed, high-power applications. This project focuses on analysis the strain and Self-heating effect of InAlN/GaN HEMTs and vertical GaN transistors, whereby development the flip-chip packaging technology of GaN. In the following is our proposed plan for this project: 1. Strain effect on GaN transistors: measure DC and RF under different curvature bending vehicles to apply strains. Extract channel resistance, piezoresistance coefficients, and device model to analyze strain effect of GaN transistors. 2. Self-heating effect and reliability of GaN transistors: measure CW and pulse conditions of GaN transistors at various temperatures to analysis self-heating effect. Measure GaN transistors at various voltages to analyze device reliability. Development device model including self-heating effect. 3. GaN transistors flip-chip: develop GaN transistors flip-chip using AlN substrate and then test package reliability for 3D flip-chip technology.

Project ID:PB10507-1722
External Project ID:MOST105-2221-E182-065