一種同步考慮低時鐘歪曲率及低耗能之時鐘樹合成工具

The invention brings up a method, which is applied with the skill of insertion, removal, swap and shift buffers to quickly determine the type and location of every buffer type in the clock tree , and pertinent to the combinational design process of designed clock tree to quickly determine the type and location of skew buffer, making the entire design meet the database design specification and the clock skew meet condition limitation respectively. The computation tool of the invention that quickly determines the buffer type and position in the clock tree comprises the inputted clock tree structure to be processed containing the information of each circuit and buffer insertion location, the database for inputting specific component containing the characteristics of input load, power consumption, clock delay, conversion time for output signal, etc., and initial state configuration. Determine if the lock tree structure complies with the feasible solution of design specification; if no, apply the load balancing and buffer balancing methods to get a feasible solution. Quickly determine the buffer type to reduce the power consumption of the clock tree. Apply the optimal technique integrating simulated annealing method to acquire the global optimal solution of the integrated buffer with minimum power consumption.