一種決定非對稱性Lanczos法簡化高速VLSI互連結構階數的方法

Translated title of the contribution: Method for reducing the order of interconnect model in VLSI using non-symmetric Lanczos algorithm

Wu-Shiung Feng (Inventor), Chia-Chi Chu (Inventor), MINGHONG LAI (Inventor)

Research output: Patent

Abstract

Two-sided projection-based model reductions has become a necessity for efficient interconnect modeling and simulations in VLSI design. In order to choose the order of the reduced system that can really reflect the essential dynamics of the original interconnect, the element of reduced model of the transfer function can be considered as a stopping criteria to terminate the non-symmetric Lanczos iteration process. Furthermore, it can be found that the approximate transfer function can also be expressed as the original interconnect model with some additive perturbations. The perturbation matrix only involves at most rank-2 modification at the previous step of the non-symmetric algorithm. The information of stopping criteria will provide a guideline for the order selection scheme used in the Lanczos model-order reduction algorithm.
Translated title of the contributionMethod for reducing the order of interconnect model in VLSI using non-symmetric Lanczos algorithm
Original languageChinese (Traditional)
IPCG06F 17/00(2019.01)
StatePublished - 01 09 2005

Bibliographical note

公開公告號: 2.00529012E8
Announcement ID: 2.00529012E8

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