以新型浮點運算數位信號處理器TMS320C6711與CPLD設計與製作具串聯多階電壓源轉換器架構之靜態同步補償器

Translated title of the contribution: Design and Implementation of STATCOM Employing Cascade Multilevel Voltage-Source Inverters with CPLD and Novel Floating-point DSP TMS320C6711-Based Controller

陳信豪

Research output: Types of Thesis › Master's thesis

Translated title of the contributionDesign and Implementation of STATCOM Employing Cascade Multilevel Voltage-Source Inverters with CPLD and Novel Floating-point DSP TMS320C6711-Based Controller
Original languageChinese (Traditional)
Supervisors/Advisors
  • Chang, Wei-Neng, Supervisor
StatePublished - 2004
Externally publishedYes

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