低耗能超大型積體電路可測性設計之掃描鍊重序方法

Translated title of the contribution: METHOD AND APPARATUS FOR SCAN CHAIN REORDERING IN LOW-POWER VLSI DFT DESIGNS
  • Wu-Shiung Feng (Inventor)
  • , Chia-Chi Chu (Inventor)
  • , CHIAMING HO (Inventor)
  • , HERNG-JER LEE (Inventor)

Research output: Patent

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