使用時脈閘控的GALS電路之Viterbi 解碼器

Translated title of the contribution: Design of a Viterbi Decoder based on Clock-Gated

曾百敬

Research output: Types of Thesis › Master's thesis

Translated title of the contributionDesign of a Viterbi Decoder based on Clock-Gated
Original languageChinese (Traditional)
Supervisors/Advisors
  • Lee, Jiann-Der, Supervisor
  • Chen, Ren-Der, Supervisor
StatePublished - 2008
Externally publishedYes

Access to Document

Cite this