具有多重電阻態的電阻式記憶體

Translated title of the contribution: Resistive memory having multiple resistance states

Jer-Chyi Wang (Inventor), WEIFAN CHEN (Inventor), CHUN-HSIANG CHIU (Inventor)

Research output: Patent

Abstract

Disclosed is a resistive memory having multiple resistance states, comprising a first electrode, a second electrode, and an ion conduction unit. The second electrode and the first electrode are disposed to be spaced from each other. The second electrode has an oxidation potential that is lower than that of the first electrode. Application of a positive voltage to the first electrode generates a plurality of metal cations. The ion conduction unit is interposed between the first electrode and the second electrode and comprises a first ion conduction layer adjacent to the first electrode and a second ion conduction layer located between the first ion conduction layer and the second electrode. A diffusion speed of the metal cations in the first ion conduction layer is greater than a diffusion speed thereof in the second ion conduction layer.
Translated title of the contributionResistive memory having multiple resistance states
Original languageChinese (Traditional)
IPCG11C-013/00(2006.01)
StatePublished - 16 02 2017

Bibliographical note

公開公告號: 2.01706996E8
Announcement ID: 2.01706996E8

Fingerprint

Dive into the research topics of 'Resistive memory having multiple resistance states'. Together they form a unique fingerprint.

Cite this