利用Steiner樹之滑動操作解決超大型積體電路連線合成之效能最佳化設計

Translated title of the contribution: Performance Optimization of VLSI Interconnect Synthesis Using Sliding Operations on Rectilinear Steiner Trees

王志宏

Research output: Types of Thesis › Master's thesis

Translated title of the contributionPerformance Optimization of VLSI Interconnect Synthesis Using Sliding Operations on Rectilinear Steiner Trees
Original languageChinese (Traditional)
Supervisors/Advisors
  • Feng, Wu-Shiung, Supervisor
  • Chu, Chia-Chi, Supervisor
StatePublished - 2003
Externally publishedYes

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