| Translated title of the contribution | Deep In-Memory Architecture for Time-Domain Convolutional Neural Network Chip Design |
|---|---|
| Original language | Chinese (Traditional) |
| Supervisors/Advisors |
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| State | Published - 2023 |
| Externally published | Yes |
基於深度記憶體架構之時域卷積神經網路晶片設計
許登翔
Research output: Types of Thesis › Master's thesis