快速鎖定的全數位責任週期同步校正電路

Translated title of the contribution: A Fast Locked All Digital Duty Cycle Synchronization Mirror Delay Circuits

黃資文

Research output: Types of Thesis › Master's thesis

Translated title of the contributionA Fast Locked All Digital Duty Cycle Synchronization Mirror Delay Circuits
Original languageChinese (Traditional)
Supervisors/Advisors
  • Kao, Shao-Ku, Supervisor
StatePublished - 2015
Externally publishedYes

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