運用隨機編碼降低參考突波的數位倍數延遲鎖相迴路之時脈產生器

Translated title of the contribution: Digital MDLL-based clock generator using random code to achieve low reference spur
  • 王舜民

Research output: Types of Thesis › Master's thesis

Translated title of the contributionDigital MDLL-based clock generator using random code to achieve low reference spur
Original languageChinese (Traditional)
Supervisors/Advisors
  • Kao, Shao-Ku, Supervisor
StatePublished - 2015
Externally publishedYes

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