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運算單元共用之低硬體成本抗軟錯誤算術電路晶片設計

Translated title of the contribution: Low-Hardware Cost Soft-Error-Tolerant Arithmetic Circuit Design by Using Hardware-Sharing
  • 隋佳良

Research output: Types of Thesis › Master's thesis

Translated title of the contributionLow-Hardware Cost Soft-Error-Tolerant Arithmetic Circuit Design by Using Hardware-Sharing
Original languageChinese (Traditional)
Supervisors/Advisors
  • Wey, I-Chyn, Supervisor
StatePublished - 2012
Externally publishedYes

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