適用於新式多希解碼之位元糾刪解碼器之VLSI架構

Translated title of the contribution: VLSI Architecture of Bit-Erased Decoder for Modified Dorsch Decoding

呂紹豪

Research output: Types of Thesis › Master's thesis

Translated title of the contributionVLSI Architecture of Bit-Erased Decoder for Modified Dorsch Decoding
Original languageChinese (Traditional)
Supervisors/Advisors
  • Lu, Erl-Huei, Supervisor
StatePublished - 2004
Externally publishedYes

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