避免基板研磨之化合物半導體磊晶生長方法

Translated title of the contribution: Compound semiconductor epitaxial growth method for avoiding polishing of substrate

Hsien-Chin Chiu (Inventor), Liann-Be Chang (Inventor), Ray-Ming Lin (Inventor), SHU-LIANG LIN (Inventor), ZHAO-WEI LIN (Inventor), YUAN-JIE LV (Inventor), ZHONG-HAO JIANG (Inventor), ATANU DAS (Inventor)

Research output: Patent

Abstract

A compound semiconductor epitaxial growth method for avoiding polishing of substrate is executed in an epitaxial growth apparatus. Two thin substrates, each is about 150-350 micrometers, are used. A first substrate is loaded in a substrate bearing platform and used with a second substrate for offering epitaxial growth to replace a general thick substrate with 400 micrometers. The compound semiconductor structure after epitaxy has a thinner substrate thickness. Not only polishing degree for subsequent substrate can be reduced, but also characteristics loss caused by polishing can be avoided, and process time can be decreased. Simultaneously, the first substrate is a reusable dummy wafer of the epitaxial growth apparatus for preventing from generation of additional production cost.
Translated title of the contributionCompound semiconductor epitaxial growth method for avoiding polishing of substrate
Original languageChinese (Traditional)
IPCH01L-021/205(2006.01);H01L-021/365(2006.01)
StatePublished - 01 11 2010

Bibliographical note

公開公告號: 2.0103938E8
Announcement ID: 2.0103938E8

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