| Translated title of the contribution | A 10.2-to-35.6 TOPS/W Compute-In Memory Design with Reconfigurable bit precision and adaptive power adjustment |
|---|---|
| Original language | Chinese (Traditional) |
| Supervisors/Advisors |
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| State | Published - 2024 |
| Externally published | Yes |
高能源使用效率並具動態調整功率消耗及彈性內存配置特性之記憶體內運算電路設計
徐義杰
Research output: Types of Thesis › Master's thesis