A 0.18μm probabilistic-based noise-tolerate circuit design and implementation with 28.7dB noise-immunity improvement

I. Chyn Wey; You Gang Chen; Changhong Yu; Jie Chen; An Yen Wu

doi:10.1109/ASSCC.2006.357908

A 0.18μm probabilistic-based noise-tolerate circuit design and implementation with 28.7dB noise-immunity improvement

I. Chyn Wey^*, You Gang Chen, Changhong Yu, Jie Chen, An Yen Wu

^*Corresponding author for this work

Research output: Contribution to conference › Conference Paper › peer-review

22 Scopus citations

Abstract

As the size of CMOS devices is scaled down to the nanoscale level, noise interferences start to significantly affect the VLSI circuit performance. Because the injected noise is random and dynamic in nature, a probabilistic-based approach is more suitable to handle signal errors than the conventional deterministic circuit designs. In this paper, we design and implement an 8-bit Markov Random Field carry lookahead adder (MRF_CLA) probabilistic-based noise-tolerant circuit in 0.18μm CMOS process technology. This is the first working silicon design to prove the design concept of the noise-tolerant MRF circuits. The measurement results show that the proposed of the MRF adder can provide 28.7dB of noise-immunity as compared with its conventional CMOS design, when both circuits are facing the same server SNR environment. The MRF adder circuit can also achieve 10^-6 BER when the supply voltage is only 0.45V and SNR is only 10dB.

Original language	English
Pages	291-294
Number of pages	4
DOIs	https://doi.org/10.1109/ASSCC.2006.357908
State	Published - 2006
Externally published	Yes
Event	2006 IEEE Asian Solid-State Circuits Conference, ASSCC 2006 - Hangzhou, China Duration: 13 11 2006 → 15 11 2006

Conference

Conference	2006 IEEE Asian Solid-State Circuits Conference, ASSCC 2006
Country/Territory	China
City	Hangzhou
Period	13/11/06 → 15/11/06

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10.1109/ASSCC.2006.357908

Cite this

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title = "A 0.18μm probabilistic-based noise-tolerate circuit design and implementation with 28.7dB noise-immunity improvement",

abstract = "As the size of CMOS devices is scaled down to the nanoscale level, noise interferences start to significantly affect the VLSI circuit performance. Because the injected noise is random and dynamic in nature, a probabilistic-based approach is more suitable to handle signal errors than the conventional deterministic circuit designs. In this paper, we design and implement an 8-bit Markov Random Field carry lookahead adder (MRF_CLA) probabilistic-based noise-tolerant circuit in 0.18μm CMOS process technology. This is the first working silicon design to prove the design concept of the noise-tolerant MRF circuits. The measurement results show that the proposed of the MRF adder can provide 28.7dB of noise-immunity as compared with its conventional CMOS design, when both circuits are facing the same server SNR environment. The MRF adder circuit can also achieve 10-6 BER when the supply voltage is only 0.45V and SNR is only 10dB.",

author = "Wey, {I. Chyn} and Chen, {You Gang} and Changhong Yu and Jie Chen and Wu, {An Yen}",

year = "2006",

doi = "10.1109/ASSCC.2006.357908",

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AU - Wey, I. Chyn

AU - Chen, You Gang

AU - Yu, Changhong

AU - Chen, Jie

AU - Wu, An Yen

PY - 2006

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AB - As the size of CMOS devices is scaled down to the nanoscale level, noise interferences start to significantly affect the VLSI circuit performance. Because the injected noise is random and dynamic in nature, a probabilistic-based approach is more suitable to handle signal errors than the conventional deterministic circuit designs. In this paper, we design and implement an 8-bit Markov Random Field carry lookahead adder (MRF_CLA) probabilistic-based noise-tolerant circuit in 0.18μm CMOS process technology. This is the first working silicon design to prove the design concept of the noise-tolerant MRF circuits. The measurement results show that the proposed of the MRF adder can provide 28.7dB of noise-immunity as compared with its conventional CMOS design, when both circuits are facing the same server SNR environment. The MRF adder circuit can also achieve 10-6 BER when the supply voltage is only 0.45V and SNR is only 10dB.

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A 0.18μm probabilistic-based noise-tolerate circuit design and implementation with 28.7dB noise-immunity improvement

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