A deep submicron Si1-xGex/Si vertical PMOSFET fabricated by Ge Ion implantation

K. C. Liu*, S. K. Ray, S. K. Oswal, S. K. Banerjee

*Corresponding author for this work

Research output: Contribution to journalJournal Article peer-review

35 Scopus citations

Abstract

We report a deep submicron vertical PMOS transistor using strained Si1-xGex channel formed by Ge ion implantation and solid phase epitaxy. These vertical structure Si1-xGex/Si transistors can be fabricated with channel lengths below 0.2 μm without using any sophisticated lithographic techniques and with a regular MOS process. The enhancement of hole mobility in a direction normal to the growth plane of strained Si1-xGex over that of bulk Si has been experimentally demonstrated for the first time using this vertical MOSFET. The drain current of these vertical MOS devices has been found to be enhanced by as much as 100% over control Si devices. The presence of the built-in electric field due to a graded SiGe channel has also been found to be effective in further enhancement of the drive current in implanted-channel MOSFET's.

Original languageEnglish
Pages (from-to)13-15
Number of pages3
JournalIEEE Electron Device Letters
Volume19
Issue number1
DOIs
StatePublished - 01 1998
Externally publishedYes

Keywords

  • Bandgap engineering
  • Hole mobility enhancement
  • SiGe/Si
  • Vertical MOSFET

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