A deep submicron Si1-xGex/Si vertical PMOSFET fabricated by Ge Ion implantation

K. C. Liu; S. K. Ray; S. K. Oswal; S. K. Banerjee

doi:10.1109/55.650338

A deep submicron Si_1-xGe_x/Si vertical PMOSFET fabricated by Ge Ion implantation

K. C. Liu^*, S. K. Ray, S. K. Oswal, S. K. Banerjee

^*Corresponding author for this work

Research output: Contribution to journal › Journal Article › peer-review

34 Scopus citations

Abstract

We report a deep submicron vertical PMOS transistor using strained Si_1-xGe_x channel formed by Ge ion implantation and solid phase epitaxy. These vertical structure Si_1-xGe_x/Si transistors can be fabricated with channel lengths below 0.2 μm without using any sophisticated lithographic techniques and with a regular MOS process. The enhancement of hole mobility in a direction normal to the growth plane of strained Si_1-xGe_x over that of bulk Si has been experimentally demonstrated for the first time using this vertical MOSFET. The drain current of these vertical MOS devices has been found to be enhanced by as much as 100% over control Si devices. The presence of the built-in electric field due to a graded SiGe channel has also been found to be effective in further enhancement of the drive current in implanted-channel MOSFET's.

Original language	English
Pages (from-to)	13-15
Number of pages	3
Journal	IEEE Electron Device Letters
Volume	19
Issue number	1
DOIs	https://doi.org/10.1109/55.650338
State	Published - 01 1998
Externally published	Yes

Keywords

Bandgap engineering
Hole mobility enhancement
SiGe/Si
Vertical MOSFET

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title = "A deep submicron Si1-xGex/Si vertical PMOSFET fabricated by Ge Ion implantation",

abstract = "We report a deep submicron vertical PMOS transistor using strained Si1-xGex channel formed by Ge ion implantation and solid phase epitaxy. These vertical structure Si1-xGex/Si transistors can be fabricated with channel lengths below 0.2 μm without using any sophisticated lithographic techniques and with a regular MOS process. The enhancement of hole mobility in a direction normal to the growth plane of strained Si1-xGex over that of bulk Si has been experimentally demonstrated for the first time using this vertical MOSFET. The drain current of these vertical MOS devices has been found to be enhanced by as much as 100\% over control Si devices. The presence of the built-in electric field due to a graded SiGe channel has also been found to be effective in further enhancement of the drive current in implanted-channel MOSFET's.",

keywords = "Bandgap engineering, Hole mobility enhancement, SiGe/Si, Vertical MOSFET",

author = "Liu, \{K. C.\} and Ray, \{S. K.\} and Oswal, \{S. K.\} and Banerjee, \{S. K.\}",

year = "1998",

month = jan,

doi = "10.1109/55.650338",

language = "英语",

volume = "19",

pages = "13--15",

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T1 - A deep submicron Si1-xGex/Si vertical PMOSFET fabricated by Ge Ion implantation

AU - Liu, K. C.

AU - Ray, S. K.

AU - Oswal, S. K.

AU - Banerjee, S. K.

PY - 1998/1

Y1 - 1998/1

N2 - We report a deep submicron vertical PMOS transistor using strained Si1-xGex channel formed by Ge ion implantation and solid phase epitaxy. These vertical structure Si1-xGex/Si transistors can be fabricated with channel lengths below 0.2 μm without using any sophisticated lithographic techniques and with a regular MOS process. The enhancement of hole mobility in a direction normal to the growth plane of strained Si1-xGex over that of bulk Si has been experimentally demonstrated for the first time using this vertical MOSFET. The drain current of these vertical MOS devices has been found to be enhanced by as much as 100% over control Si devices. The presence of the built-in electric field due to a graded SiGe channel has also been found to be effective in further enhancement of the drive current in implanted-channel MOSFET's.

AB - We report a deep submicron vertical PMOS transistor using strained Si1-xGex channel formed by Ge ion implantation and solid phase epitaxy. These vertical structure Si1-xGex/Si transistors can be fabricated with channel lengths below 0.2 μm without using any sophisticated lithographic techniques and with a regular MOS process. The enhancement of hole mobility in a direction normal to the growth plane of strained Si1-xGex over that of bulk Si has been experimentally demonstrated for the first time using this vertical MOSFET. The drain current of these vertical MOS devices has been found to be enhanced by as much as 100% over control Si devices. The presence of the built-in electric field due to a graded SiGe channel has also been found to be effective in further enhancement of the drive current in implanted-channel MOSFET's.

KW - Bandgap engineering

KW - Hole mobility enhancement

KW - SiGe/Si

KW - Vertical MOSFET

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U2 - 10.1109/55.650338

DO - 10.1109/55.650338

M3 - 文章

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VL - 19

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JO - IEEE Electron Device Letters

JF - IEEE Electron Device Letters

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ER -

A deep submicron Si_1-xGe_x/Si vertical PMOSFET fabricated by Ge Ion implantation

Abstract

Keywords

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