A High- Speed Encoding Circuit for An (N,K) Cyclic Code Based on Its Parity Polynomial

Erl-Huei Lu

Research output: Contribution to journalJournal Article peer-review

Abstract

     本文利用(n,k)循環碼的同位多項式為其設計了一個高速編碼電路,電路 最長傳遞時間僅為將一個資料經由一個互斥或閘送入正反器中所需之時間,且此 時間與消息k值大小無關.
     An encoding algorithm for an (n,k) cyclic elide baaed on ita parity polynomial is proposed. With the algorithm, a high-speed encoding circuit is designud. The longest propagation time in this new encoding circuit is the time lo pass a data through just one EXCLUSIVE OR gale into a FLIP-FLOP, and is independent of k. Furthermore, the encoding circuit is regular and modular, lherel'ore. suitable For VLSI implementation.
Original languageAmerican English
Pages (from-to)33-36
Journal中正嶺學報
Volume21
Issue number1
StatePublished - 1992

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