A highly reliable multi-level and 2-bit/cell operation of wrapped-select-gate (WSG) SONOS memory with optimized ONO thickness

  • Woei Cherng Wu*
  • , Tien Sheng Chao
  • , Wu Chin Peng
  • , Wen Luh Yang
  • , Jer Chyi Wang
  • , Jian Hao Chen
  • , Ming Wen Ma
  • , Chao Sung Lai
  • , Tsung Yu Yang
  • , Tzu Ping Chen
  • , Chien Hung Chen
  • , Chih Hung Lin
  • , Hwi Huang Chen
  • , Joe Ko
  • *Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

High-performance wrapped-select-gate (WSG) SONOS (silicon-oxide-nitride- silicon) memory cells with multi-level and 2-bit/cell operation have been successfully demonstrated. The source-side injection mechanism with different ONO thickness in WSG-SONOS memory was well investigated. The different programming efficiency of the WSG-SONOS memory with different ONO thickness can be explained by the lateral electrical field extracted from the simulation. Furthermore, multi-level storage is easily obtained and well Vth distribution is also presented. High program/erase speed (10us/5ms) and low programming current (3.5uA) are performed to achieve the multi-level operation with excellent gate and drain disturbance, second-bit effect, data retention and endurance.

Original languageEnglish
Title of host publication2007 International Symposium on VLSI Technology, Systems and Applications, VLSI-TSA - Proceedings of Technical Papers
DOIs
StatePublished - 2007
Event2007 International Symposium on VLSI Technology, Systems and Applications, VLSI-TSA - Hsinchu, Taiwan
Duration: 23 04 200725 04 2007

Publication series

NameInternational Symposium on VLSI Technology, Systems, and Applications, Proceedings

Conference

Conference2007 International Symposium on VLSI Technology, Systems and Applications, VLSI-TSA
Country/TerritoryTaiwan
CityHsinchu
Period23/04/0725/04/07

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