A Highly Reliable multi-level and 2-bits/cell operation of Wrapped-Select-Gate SONOS memory with Optimized ONO Thickness

Woei-Cherng Wu, Tien-Sheng Chao, Wu-Ching Peng, Wen-Luh Yang, Jer-Chyi Wang, Jian-Hao Chen, Chao-Sung Lai, Tsung-Yu Yang

Research output: Contribution to conferenceProceeding

Original languageAmerican English
StatePublished - 2007
Event2007 International Symposium on VLSI Technology, Systems, and Applications (VLSI-TSA) - Hsinchu, Taiwan
Duration: 23 04 200725 04 2007

Conference

Conference2007 International Symposium on VLSI Technology, Systems, and Applications (VLSI-TSA)
Period23/04/0725/04/07

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