A highly reliable NAND structure flash memory capable for low voltage operation

Y. C. Lin*, C. S. Lai, S. S. Chung, Evans Yang, S. Pittikoun, S. M. Tzeng, C. C.H. Hsu

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

1 Scopus citations

Abstract

For the first time, a new flash cell called buried bit-line AND (BiAND) is proposed. Buried bit-line AND flash can achieve low voltage programming/erase. The major difference of the current flash cell from the conventional AND flash is the special design of a bit-line contact. With the use of the buried bit-line, the required high program/erase voltage for FN tunneling can be divided between the word-line and bit-line such that lower voltage operation is feasible. Further, the comparison of the cell reliability for different schemes, i.e., high voltage F-N (HV F-N) and Bi F-N operation schemes, has been studied. Results show that BiAND scheme gives much better endurance and data retention characteristics. This makes it successful for a low voltage and high reliability design.

Original languageEnglish
Title of host publication2005 IEEE International Reliability Physics Symposium Proceedings, 43rd Annual
Pages666-667
Number of pages2
StatePublished - 2005
Event2005 IEEE International Reliability Physics Symposium Proceedings, 43rd Annual - San Jose, CA, United States
Duration: 17 04 200521 04 2005

Publication series

NameIEEE International Reliability Physics Symposium Proceedings
ISSN (Print)1541-7026

Conference

Conference2005 IEEE International Reliability Physics Symposium Proceedings, 43rd Annual
Country/TerritoryUnited States
CitySan Jose, CA
Period17/04/0521/04/05

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