A low-error statistical fixed-width multiplier and its applications

Yuan Ho Chen, Chih Wen Lu*, Hsin Chen Chiang, Tsin Yuan Chang, Chin Hsia

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

3 Scopus citations

Abstract

In this paper, an error compensation method for fixed-width two's-complement multipliers is proposed. According to the statistical analysis for the truncation term, a general form for different word length compensation circuit is made up. For example, the proposed 8x8 fixed-width multiplier achieves 15.65% accuracy compared with direct-truncation multiplier. Also, the proposed multiplier has 41% savings compared with post-truncation multiplier when it is implemented in a 0.18-μm process. As the proposed multipliers applying to discrete cosine transform (DCT) design to demonstrate the system performance, the results show the proposed core can save 15% area with 9.2 dB peak signal-to-noise ratio (PSNR) penalty. Therefore, the proposed multiplier has a low hardware cost achieving high accuracy designs.

Original languageEnglish
Title of host publicationProceedings - 2012 International Symposium on Instrumentation and Measurement, Sensor Network and Automation, IMSNA 2012
Pages39-43
Number of pages5
DOIs
StatePublished - 2012
Externally publishedYes
Event2012 International Symposium on Instrumentation and Measurement, Sensor Network and Automation, IMSNA 2012 - Sanya, Hainan, China
Duration: 25 08 201228 08 2012

Publication series

NameProceedings - 2012 International Symposium on Instrumentation and Measurement, Sensor Network and Automation, IMSNA 2012
Volume1

Conference

Conference2012 International Symposium on Instrumentation and Measurement, Sensor Network and Automation, IMSNA 2012
Country/TerritoryChina
CitySanya, Hainan
Period25/08/1228/08/12

Keywords

  • Fixed-width
  • Low-error
  • Statistical compensation
  • Two's-complement Multipliers

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