A low noise 3.1-10.6 GHz pMOS distributed amplifier for ultra-wideband applications

Chian Chang Wei; Hsien Chinn Chiu; Wu Shiung Feng

doi:10.1002/mop.22532

A low noise 3.1-10.6 GHz pMOS distributed amplifier for ultra-wideband applications

Chian Chang Wei^*
, Hsien Chinn Chiu
, Wu Shiung Feng

^*Corresponding author for this work

Department of Electronic Engineering

Chang Gung University

Research output: Contribution to journal › Journal Article › peer-review

2 Scopus citations

Abstract

A low noise pMOS distributed amplifier for Ultra-wideband (UWB) application is presented in this study. The amplifier is a two-stage design fabricated in a standard 0.18-μm CMOS process. The pMOS-based distributed amplifier as input stage is used to achieve a better noise figure and a wider bandwidth; besides, the nMOS common-source amplifier as output stage is applied to obtain sufficient gain over the band, respectively. The fully amplifier exhibits a power gain of 9 dB with a gain flatness of 0.8 dB, and noise figures are approximately lower than 5.3 dB from 3.1 to 10.6 GHz. The 1-dB compression point and input third-order intercept points are -8 dBm and 3.5 dBm with total power consumption of 22.5 mW, respectively. Experimental results indicate that the proposed architecture exhibits low noise and high gain performance for UWB applications.

Original language	English
Pages (from-to)	1641-1644
Number of pages	4
Journal	Microwave and Optical Technology Letters
Volume	49
Issue number	7
DOIs	https://doi.org/10.1002/mop.22532
State	Published - 07 2007

Keywords

CMOS
Distributed amplifier
UWB

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10.1002/mop.22532

Cite this

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title = "A low noise 3.1-10.6 GHz pMOS distributed amplifier for ultra-wideband applications",

abstract = "A low noise pMOS distributed amplifier for Ultra-wideband (UWB) application is presented in this study. The amplifier is a two-stage design fabricated in a standard 0.18-μm CMOS process. The pMOS-based distributed amplifier as input stage is used to achieve a better noise figure and a wider bandwidth; besides, the nMOS common-source amplifier as output stage is applied to obtain sufficient gain over the band, respectively. The fully amplifier exhibits a power gain of 9 dB with a gain flatness of 0.8 dB, and noise figures are approximately lower than 5.3 dB from 3.1 to 10.6 GHz. The 1-dB compression point and input third-order intercept points are -8 dBm and 3.5 dBm with total power consumption of 22.5 mW, respectively. Experimental results indicate that the proposed architecture exhibits low noise and high gain performance for UWB applications.",

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year = "2007",

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AU - Wei, Chian Chang

AU - Chiu, Hsien Chinn

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N2 - A low noise pMOS distributed amplifier for Ultra-wideband (UWB) application is presented in this study. The amplifier is a two-stage design fabricated in a standard 0.18-μm CMOS process. The pMOS-based distributed amplifier as input stage is used to achieve a better noise figure and a wider bandwidth; besides, the nMOS common-source amplifier as output stage is applied to obtain sufficient gain over the band, respectively. The fully amplifier exhibits a power gain of 9 dB with a gain flatness of 0.8 dB, and noise figures are approximately lower than 5.3 dB from 3.1 to 10.6 GHz. The 1-dB compression point and input third-order intercept points are -8 dBm and 3.5 dBm with total power consumption of 22.5 mW, respectively. Experimental results indicate that the proposed architecture exhibits low noise and high gain performance for UWB applications.

AB - A low noise pMOS distributed amplifier for Ultra-wideband (UWB) application is presented in this study. The amplifier is a two-stage design fabricated in a standard 0.18-μm CMOS process. The pMOS-based distributed amplifier as input stage is used to achieve a better noise figure and a wider bandwidth; besides, the nMOS common-source amplifier as output stage is applied to obtain sufficient gain over the band, respectively. The fully amplifier exhibits a power gain of 9 dB with a gain flatness of 0.8 dB, and noise figures are approximately lower than 5.3 dB from 3.1 to 10.6 GHz. The 1-dB compression point and input third-order intercept points are -8 dBm and 3.5 dBm with total power consumption of 22.5 mW, respectively. Experimental results indicate that the proposed architecture exhibits low noise and high gain performance for UWB applications.

KW - CMOS

KW - Distributed amplifier

KW - UWB

UR - https://www.scopus.com/pages/publications/34249819704

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DO - 10.1002/mop.22532

M3 - 文章

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JO - Microwave and Optical Technology Letters

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A low noise 3.1-10.6 GHz pMOS distributed amplifier for ultra-wideband applications

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Keywords

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