A memory efficient motion estimator for three step search block-matching algorithm

Yeong Kang Lai

doi:10.1109/30.964158

A memory efficient motion estimator for three step search block-matching algorithm

Yeong Kang Lai^*

^*Corresponding author for this work

National Chung Hsing University

Research output: Contribution to journal › Journal Article › peer-review

16 Scopus citations

Abstract

This paper describes a memory efficient array architecture with data-rings for the 3-step hierarchical search block-matching algorithm (3SHS). With the efficient data-rings and memory organization, the regular raster-scanned data flow and comparator-tree structure can be used to simplify control scheme and reduce latency, respectively. In addition, we utilize the three-half-search-area scheme and circular addressing method to reduce external memory access and memory size, respectively. The results demonstrate that the array architecture with memory efficient scheme requires a smaller memory size and low I/O bandwidth. It also provides a high normalized throughput solution for the 3SHS.

Original language	English
Pages (from-to)	644-651
Number of pages	8
Journal	IEEE Transactions on Consumer Electronics
Volume	47
Issue number	3
DOIs	https://doi.org/10.1109/30.964158
State	Published - 08 2001
Externally published	Yes

Access to Document

10.1109/30.964158

Cite this

@article{935b36cd7d6548a3a27ec6b03cdd998b,

title = "A memory efficient motion estimator for three step search block-matching algorithm",

abstract = "This paper describes a memory efficient array architecture with data-rings for the 3-step hierarchical search block-matching algorithm (3SHS). With the efficient data-rings and memory organization, the regular raster-scanned data flow and comparator-tree structure can be used to simplify control scheme and reduce latency, respectively. In addition, we utilize the three-half-search-area scheme and circular addressing method to reduce external memory access and memory size, respectively. The results demonstrate that the array architecture with memory efficient scheme requires a smaller memory size and low I/O bandwidth. It also provides a high normalized throughput solution for the 3SHS.",

author = "Lai, {Yeong Kang}",

year = "2001",

month = aug,

doi = "10.1109/30.964158",

language = "英语",

volume = "47",

pages = "644--651",

journal = "IEEE Transactions on Consumer Electronics",

issn = "0098-3063",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

number = "3",

}

TY - JOUR

T1 - A memory efficient motion estimator for three step search block-matching algorithm

AU - Lai, Yeong Kang

PY - 2001/8

Y1 - 2001/8

N2 - This paper describes a memory efficient array architecture with data-rings for the 3-step hierarchical search block-matching algorithm (3SHS). With the efficient data-rings and memory organization, the regular raster-scanned data flow and comparator-tree structure can be used to simplify control scheme and reduce latency, respectively. In addition, we utilize the three-half-search-area scheme and circular addressing method to reduce external memory access and memory size, respectively. The results demonstrate that the array architecture with memory efficient scheme requires a smaller memory size and low I/O bandwidth. It also provides a high normalized throughput solution for the 3SHS.

AB - This paper describes a memory efficient array architecture with data-rings for the 3-step hierarchical search block-matching algorithm (3SHS). With the efficient data-rings and memory organization, the regular raster-scanned data flow and comparator-tree structure can be used to simplify control scheme and reduce latency, respectively. In addition, we utilize the three-half-search-area scheme and circular addressing method to reduce external memory access and memory size, respectively. The results demonstrate that the array architecture with memory efficient scheme requires a smaller memory size and low I/O bandwidth. It also provides a high normalized throughput solution for the 3SHS.

UR - http://www.scopus.com/inward/record.url?scp=0035435823&partnerID=8YFLogxK

U2 - 10.1109/30.964158

DO - 10.1109/30.964158

M3 - 文章

AN - SCOPUS:0035435823

SN - 0098-3063

VL - 47

SP - 644

EP - 651

JO - IEEE Transactions on Consumer Electronics

JF - IEEE Transactions on Consumer Electronics

IS - 3

ER -

A memory efficient motion estimator for three step search block-matching algorithm

Abstract

Access to Document

Other files and links

Fingerprint

Cite this