Abstract
In this brief, a new Bicomplementary metal-oxide-semiconductor (CMOS) increased full-swing inverter (IFSI) and a new BiCMOS increased full-swing buffer (IFSB) for low voltage/low power ULSI (ultralarge scale integration) systems are proposed. Based on the SPICE simulations, we demonstrate that these circuits can operate at low internal voltage (Vint) and have low input signal swing. With Vint > |Vt| (assuming Vtn = -VtP), the circuits work properly. When the capacitor load is larger than 0.6pf, the propagation delays and the delay power products of the proposed circuits for different internal voltages are better than those of previous circuits [3] under the same circuit design parameters. Moreover, the proposed circuits achieve significant improvement in speed and noise margin. The results in this brief can avoid the trial and error step in the circuit sizing operation to reduce the power consumpt.
| Original language | English |
|---|---|
| Pages (from-to) | 1238-1242 |
| Number of pages | 5 |
| Journal | IEEE Transactions on Circuits and Systems I: Fundamental Theory and Applications |
| Volume | 47 |
| Issue number | 8 |
| DOIs | |
| State | Published - 2000 |
| Externally published | Yes |
Keywords
- Increased full-swing buffer (IFSB)
- Increased full-swing converter (IFSC)
- Increased full-swing inverter (IFSI)
- Low voltage/low power
- Ultralarge scale integration (ULSI)