TY - JOUR
T1 - A new step-by-step decoder for double-error-correcting primitive binary bch codes in normal basis
AU - Cheng, Yi Chang
AU - Lu, Erl Heul
AU - Chang, To
AU - Lu, Po Chiang
PY - 1996/4/1
Y1 - 1996/4/1
N2 - A new step-by-step decoder for double-error-correcting primitive binary BCH codes in normal basis is presented in this paper. This decoder uses a new technique that can determine whether the checked bit is in error or not. This technique also can directly decode any bit in a received vector without knowing the number of errors and also without temporarily changing any received bit. We also transformed the syndrome values S1 and S3 from conventional basis to normal basis, since in normal basis, computing a cube in GF(2m) is faster and simpler than in conventional basis. Moreover, owing to the simple and regular decoding procedure, the new algorithm is suitable for VLSI implementation. In this paper, we use the new method to implement the (15,7) double-error-correcting primitive binary BCH codes in normal basis. The decoding speed (or data rate) of the new decoder is 2776kbits−1 for a 5.55MHz clock rate and m = 7, which is faster than a conventional decoder.
AB - A new step-by-step decoder for double-error-correcting primitive binary BCH codes in normal basis is presented in this paper. This decoder uses a new technique that can determine whether the checked bit is in error or not. This technique also can directly decode any bit in a received vector without knowing the number of errors and also without temporarily changing any received bit. We also transformed the syndrome values S1 and S3 from conventional basis to normal basis, since in normal basis, computing a cube in GF(2m) is faster and simpler than in conventional basis. Moreover, owing to the simple and regular decoding procedure, the new algorithm is suitable for VLSI implementation. In this paper, we use the new method to implement the (15,7) double-error-correcting primitive binary BCH codes in normal basis. The decoding speed (or data rate) of the new decoder is 2776kbits−1 for a 5.55MHz clock rate and m = 7, which is faster than a conventional decoder.
UR - http://www.scopus.com/inward/record.url?scp=0030127175&partnerID=8YFLogxK
U2 - 10.1080/002072196137138
DO - 10.1080/002072196137138
M3 - 文章
AN - SCOPUS:0030127175
SN - 0020-7217
VL - 80
SP - 501
EP - 511
JO - International Journal of Electronics
JF - International Journal of Electronics
IS - 4
ER -