A novel non-volatile memory cell using a gated-diode structure with a trapping-nitride storage layer

W. J. Tsai, T. F. Ou, H. L. Kao, E. K. Lat, Y. Y. Liao, C. C. Yeh, Tahui Wang, Joseph Ku, Chih Yuan Lu

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

3 Scopus citations

Abstract

A novel trapping-nitride-based non-volatile memory cell by using a gated-diode structure is proposed. Fowler-Nordheim (FN) electron injection and band-to-band-tunneling induced hot-hole (BTBT HH) injection are utilized as the erase and program methods, respectively. BTBT current modulated by the trapped charges is the sensing signal to distinguish the cell's bit state. This cell structure overcomes the channel-length related drawbacks in convention field-effect-transistor (FET)-based cells. Furthermore, its array architecture and bias methods can relieve the complex word-line (WL) bias schemes and program-inhibit techniques used in NAND-type arrays. Good program/erase characteristics and reliability are also presented.

Original languageEnglish
Title of host publication2006 Symposium on VLSI Technology, VLSIT - Digest of Technical Papers
Pages42-43
Number of pages2
StatePublished - 2006
Externally publishedYes
Event2006 Symposium on VLSI Technology, VLSIT - Honolulu, HI, United States
Duration: 13 06 200615 06 2006

Publication series

NameDigest of Technical Papers - Symposium on VLSI Technology
ISSN (Print)0743-1562

Conference

Conference2006 Symposium on VLSI Technology, VLSIT
Country/TerritoryUnited States
CityHonolulu, HI
Period13/06/0615/06/06

Keywords

  • Band-to-band-tunneling current
  • Gated-diode
  • Trapped-charge non-volatile memory

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