A Programmable VLSI Architecture for Computing Multiplication and Polynomial Evaluation Modulo a Positive Integer

A programmable VLSI architecture with regular, modular, expansible features is designed in this correspondence for computing AB mod N, AB + C mod N, and polynomial evaluation modulo N. The size of the resultant circuit can be easily expanded to improve the security of cryptosystems without making any change to its control circuit. Furthermore, the computing procedures for all N throughout the range 0 < N < 2n-1 are identical, therefore the new circuit is wellsuited for those systems in which the value of N is alternated frequently.