Skip to main navigation Skip to search Skip to main content

A reliability model for low-temperature polycrystalline silicon thin-film transistors

  • Chih Yang Chen*
  • , Jam Wem Lee
  • , Po Hao Lee
  • , Wei Cheng Chen
  • , Hsiao Yi Lin
  • , Kuan Lin Yeh
  • , Ming Wen Ma
  • , Shen De Wang
  • , Tan Fu Lei
  • *Corresponding author for this work
  • National Yang Ming Chiao Tung University
  • National Nano Device Laboratories Taiwan
  • Innolux Corporation

Research output: Contribution to journal › Journal Article › peer-review

16 Scopus citations

Abstract

We proposed here a reliability model that successfully introduces both the physical mechanisms of negative bias temperature instability (NBTI) and hot carrier stress (HCS) for p-channel low-temperature polycrystalline silicon thin-film transistors (LTPS TFTs). The proposed model is highly matched with the experimental results, in which the NBTI dominates the device reliability at small negative drain bias while the HCS dominates the degradation at large negative drain bias. In summary, the proposed model provides a comprehensive way to predict the lifetime of the p-channel LTPS TFTs, which is especially necessary for the system-on-panel circuitry design.

Original languageEnglish
Pages (from-to)392-394
Number of pages3
JournalIEEE Electron Device Letters
Volume28
Issue number5
DOIs
StatePublished - 05 2007
Externally publishedYes

Keywords

  • Hot carrier stress (HCS)
  • Low-temperature polycrystalline silicon thin-film transistors (LTPS TFTs)
  • Negative bias temperature instability (NBTI)
  • Reliability

Fingerprint

Dive into the research topics of 'A reliability model for low-temperature polycrystalline silicon thin-film transistors'. Together they form a unique fingerprint.

Cite this