A reliable and high voltage compatible CMOS I/O buffer

Hwang Cherng Chow*, You Gang Chen

*Corresponding author for this work

Research output: Contribution to journalConference articlepeer-review

1 Scopus citations


A high voltage tolerant and reliable CMOS I/O buffer without using thick-oxide devices is presented. By the floating N-WELL technique, the proposed design has a simpler structure and the good gate-oxide reliability is achieved. In addition, it is dc leakage free and has no redundant pad for dual powers. From the simulation results, the proposed circuit can demonstrate both speed enhancement about 20% in pull-up operation and 50% saving in area. Therefore, the proposed I/O buffer is very suitable for mixed voltage interface applications.

Original languageEnglish
Pages (from-to)III451-III454
JournalMidwest Symposium on Circuits and Systems
StatePublished - 2004
EventThe 2004 47th Midwest Symposium on Circuits and Systems - Conference Proceedings - Hiroshima, Japan
Duration: 25 07 200428 07 2004


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