A SIMD-based reconfigurable computing architecture with two-way pipelined reconfiguration for multimedia applications

Yeong Kang Lai; Lien Fei Chen; Jian Chou Chen; Chun Wei Chiu

A SIMD-based reconfigurable computing architecture with two-way pipelined reconfiguration for multimedia applications

Yeong Kang Lai^*, Lien Fei Chen, Jian Chou Chen, Chun Wei Chiu

^*Corresponding author for this work

National Chung Hsing University

Research output: Contribution to conference › Conference Paper › peer-review

2 Scopus citations

Abstract

In this paper, a novel SIMD-based reconfigurable computing architecture with two-way pipelined reconfiguration for multimedia applications is proposed. The reconfigurable computing system comprises an ARM processor as the host CPU and the proposed reconfigurable computing engine to accelerate the operations of the multimedia algorithms. The proposed reconfigurable computing engine is composed of the SIMD-based function units, flexible interconnection networks, and two-bank on-chip memories. The SIMD-based function unit not only can perform 64-bit scalar operations but also execute SIMD instruction sets to increase the parallelism of the multimedia algorithms. In order to connect the function units, the reconfigurable network is proposed to connect all neighbors of each function unit Owing to the above features, multimedia applications can be performed efficiently on the proposed reconfigurable architecture with high throughput.

Original language	English
Pages	261-264
Number of pages	4
State	Published - 2005
Externally published	Yes
Event	9th IEEE International Workshop on Cellular Neural Networks and their Applications, CNNA - Hsinchu, Taiwan Duration: 28 05 2005 → 30 05 2005

Conference

Conference	9th IEEE International Workshop on Cellular Neural Networks and their Applications, CNNA
Country/Territory	Taiwan
City	Hsinchu
Period	28/05/05 → 30/05/05

Keywords

Multimedia
Reconfigurable Computing Architecture
SIMD

Cite this

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title = "A SIMD-based reconfigurable computing architecture with two-way pipelined reconfiguration for multimedia applications",

abstract = "In this paper, a novel SIMD-based reconfigurable computing architecture with two-way pipelined reconfiguration for multimedia applications is proposed. The reconfigurable computing system comprises an ARM processor as the host CPU and the proposed reconfigurable computing engine to accelerate the operations of the multimedia algorithms. The proposed reconfigurable computing engine is composed of the SIMD-based function units, flexible interconnection networks, and two-bank on-chip memories. The SIMD-based function unit not only can perform 64-bit scalar operations but also execute SIMD instruction sets to increase the parallelism of the multimedia algorithms. In order to connect the function units, the reconfigurable network is proposed to connect all neighbors of each function unit Owing to the above features, multimedia applications can be performed efficiently on the proposed reconfigurable architecture with high throughput.",

keywords = "Multimedia, Reconfigurable Computing Architecture, SIMD",

author = "Lai, {Yeong Kang} and Chen, {Lien Fei} and Chen, {Jian Chou} and Chiu, {Chun Wei}",

year = "2005",

language = "英语",

pages = "261--264",

note = "9th IEEE International Workshop on Cellular Neural Networks and their Applications, CNNA ; Conference date: 28-05-2005 Through 30-05-2005",

}

A SIMD-based reconfigurable computing architecture with two-way pipelined reconfiguration for multimedia applications. / Lai, Yeong Kang; Chen, Lien Fei; Chen, Jian Chou et al.
2005. 261-264 Paper presented at 9th IEEE International Workshop on Cellular Neural Networks and their Applications, CNNA, Hsinchu, Taiwan.

Research output: Contribution to conference › Conference Paper › peer-review

TY - CONF

T1 - A SIMD-based reconfigurable computing architecture with two-way pipelined reconfiguration for multimedia applications

AU - Lai, Yeong Kang

AU - Chen, Lien Fei

AU - Chen, Jian Chou

AU - Chiu, Chun Wei

PY - 2005

Y1 - 2005

N2 - In this paper, a novel SIMD-based reconfigurable computing architecture with two-way pipelined reconfiguration for multimedia applications is proposed. The reconfigurable computing system comprises an ARM processor as the host CPU and the proposed reconfigurable computing engine to accelerate the operations of the multimedia algorithms. The proposed reconfigurable computing engine is composed of the SIMD-based function units, flexible interconnection networks, and two-bank on-chip memories. The SIMD-based function unit not only can perform 64-bit scalar operations but also execute SIMD instruction sets to increase the parallelism of the multimedia algorithms. In order to connect the function units, the reconfigurable network is proposed to connect all neighbors of each function unit Owing to the above features, multimedia applications can be performed efficiently on the proposed reconfigurable architecture with high throughput.

AB - In this paper, a novel SIMD-based reconfigurable computing architecture with two-way pipelined reconfiguration for multimedia applications is proposed. The reconfigurable computing system comprises an ARM processor as the host CPU and the proposed reconfigurable computing engine to accelerate the operations of the multimedia algorithms. The proposed reconfigurable computing engine is composed of the SIMD-based function units, flexible interconnection networks, and two-bank on-chip memories. The SIMD-based function unit not only can perform 64-bit scalar operations but also execute SIMD instruction sets to increase the parallelism of the multimedia algorithms. In order to connect the function units, the reconfigurable network is proposed to connect all neighbors of each function unit Owing to the above features, multimedia applications can be performed efficiently on the proposed reconfigurable architecture with high throughput.

KW - Multimedia

KW - Reconfigurable Computing Architecture

KW - SIMD

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M3 - 论文

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ER -

A SIMD-based reconfigurable computing architecture with two-way pipelined reconfiguration for multimedia applications

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Conference

Keywords

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