A simple approach to the realization of an FPGA- based harmonic elimination PWM generator

This paper presents a low-cost and effective approach to generate harmonic elimination PWM (HEPWM) waveforms for three-phase voltage-sourced inverters (VSIs). In the developed approach, the off-line computations of switching patterns based on harmonic elimination strategy are stored in EPROM, thereby allowing a microprocessor-free design. With the proposed configuration, the circuits for the adjustments of modulation index and phase angle are synthesized onto a field- programmable gate array (FPGA) by means of hardware description language (VHDL). Since the VHDL statements, contrary to regular microprocessor programs, are inherently concurrent, high-speed response for determination of circuit output (switching state associated with the specified modulation index and phase angle) can be achieved. Furthermore, in order to limit switching losses for high power applications, eight switching sets having switching angles from 3 to 17 (M=2N+1, N=18) in each quarter fundamental period are available. Experimental and simulation results are presented to verify the effectiveness and accuracy of the proposed configuration.