An Effective Low-Complexity Error-Floor Lowering Technique for High-Rate QC-LDPC Codes

Huang Chang Lee; Po Chiao Chou; Yeong Luh Ueng

doi:10.1109/LCOMM.2018.2864982

An Effective Low-Complexity Error-Floor Lowering Technique for High-Rate QC-LDPC Codes

Huang Chang Lee
, Po Chiao Chou
, Yeong Luh Ueng^*

^*Corresponding author for this work

Department of Electrical Engineering

Research output: Contribution to journal › Journal Article › peer-review

10 Scopus citations

Abstract

This letter presents a low-complexity redecoding-based error-floor lowering technique for quasi-cyclic low-density parity-check codes, where a predetermined set of variable nodes are attenuated before the redecoding. Using a two-stage off-line search, the attenuation set is determined based on the error patterns collected from the standard decoding simulation. It is shown that the error floor can be effectively lowered, and only a negligible amount of complexity is introduced.

Original language	English
Article number	8434230
Pages (from-to)	1988-1991
Number of pages	4
Journal	IEEE Communications Letters
Volume	22
Issue number	10
DOIs	https://doi.org/10.1109/LCOMM.2018.2864982
State	Published - 10 2018

Bibliographical note

Publisher Copyright:
© 1997-2012 IEEE.

Keywords

Low-complexity decoder
error floor
low-density parity-check (LDPC) codes

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10.1109/LCOMM.2018.2864982

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abstract = "This letter presents a low-complexity redecoding-based error-floor lowering technique for quasi-cyclic low-density parity-check codes, where a predetermined set of variable nodes are attenuated before the redecoding. Using a two-stage off-line search, the attenuation set is determined based on the error patterns collected from the standard decoding simulation. It is shown that the error floor can be effectively lowered, and only a negligible amount of complexity is introduced.",

keywords = "Low-complexity decoder, error floor, low-density parity-check (LDPC) codes",

author = "Lee, \{Huang Chang\} and Chou, \{Po Chiao\} and Ueng, \{Yeong Luh\}",

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N2 - This letter presents a low-complexity redecoding-based error-floor lowering technique for quasi-cyclic low-density parity-check codes, where a predetermined set of variable nodes are attenuated before the redecoding. Using a two-stage off-line search, the attenuation set is determined based on the error patterns collected from the standard decoding simulation. It is shown that the error floor can be effectively lowered, and only a negligible amount of complexity is introduced.

AB - This letter presents a low-complexity redecoding-based error-floor lowering technique for quasi-cyclic low-density parity-check codes, where a predetermined set of variable nodes are attenuated before the redecoding. Using a two-stage off-line search, the attenuation set is determined based on the error patterns collected from the standard decoding simulation. It is shown that the error floor can be effectively lowered, and only a negligible amount of complexity is introduced.

KW - Low-complexity decoder

KW - error floor

KW - low-density parity-check (LDPC) codes

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JO - IEEE Communications Letters

JF - IEEE Communications Letters

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ER -

An Effective Low-Complexity Error-Floor Lowering Technique for High-Rate QC-LDPC Codes

Abstract

Bibliographical note

Keywords

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