TY - JOUR
T1 - An Ultra Low Cost And Miniature 950-2050 MHz Gaas MMIC Downconverter-I
T2 - Design Approach And Simulation
AU - Hsieh, Ting Hua
AU - Wang, Huei
AU - Wang, Tahui
AU - Chen, Tzu Hung
AU - Chiang, Yit Chyun
AU - Tseng, San Tien
AU - Chen, Andy
AU - Chang, Edward Yi
PY - 1995/4
Y1 - 1995/4
N2 - A miniature ultra low cost 950-2050 MHz GaAs MMIC downconverter has been designed for satellite TV application using a 1-p.m gate-length, ion-implanted GaAs MESFET foundry process. To accurately predict circuit performances, both linear and nonlinear equivalent circuit models have been developed to characterize the RF and dc behaviors of device. Modeled simulation results show correspondence with the experimental data. This monolithic downconverter is comprised of an RF LNA, a dual-gate MESFET mixer, an IF variable gain amplifier, and a varactor tuned oscillator. The primary design specifications are (1) 50-dB conversion gain, (2) 4-dB noise figure, (3) more than 40-dB gain controllable range, and (4) 50-dBc third-order intermodulation distortion. The chip size is 1.4 x 1.5 x 0.18 mm3. It is encapsulated in a standard low cost plastic package. Moreover, this downconverter IC is promising for miniaturization and cost-reduction of a DBS receiver The detailed measured characteristics will be presented in part-II of this paper.
AB - A miniature ultra low cost 950-2050 MHz GaAs MMIC downconverter has been designed for satellite TV application using a 1-p.m gate-length, ion-implanted GaAs MESFET foundry process. To accurately predict circuit performances, both linear and nonlinear equivalent circuit models have been developed to characterize the RF and dc behaviors of device. Modeled simulation results show correspondence with the experimental data. This monolithic downconverter is comprised of an RF LNA, a dual-gate MESFET mixer, an IF variable gain amplifier, and a varactor tuned oscillator. The primary design specifications are (1) 50-dB conversion gain, (2) 4-dB noise figure, (3) more than 40-dB gain controllable range, and (4) 50-dBc third-order intermodulation distortion. The chip size is 1.4 x 1.5 x 0.18 mm3. It is encapsulated in a standard low cost plastic package. Moreover, this downconverter IC is promising for miniaturization and cost-reduction of a DBS receiver The detailed measured characteristics will be presented in part-II of this paper.
KW - Downconverter
KW - MMIC
UR - http://www.scopus.com/inward/record.url?scp=0029303988&partnerID=8YFLogxK
U2 - 10.1080/02533839.1995.9677706
DO - 10.1080/02533839.1995.9677706
M3 - 文章
AN - SCOPUS:0029303988
SN - 0253-3839
VL - 18
SP - 437
EP - 444
JO - Journal of the Chinese Institute of Engineers, Transactions of the Chinese Institute of Engineers,Series A/Chung-kuo Kung Ch'eng Hsuch K'an
JF - Journal of the Chinese Institute of Engineers, Transactions of the Chinese Institute of Engineers,Series A/Chung-kuo Kung Ch'eng Hsuch K'an
IS - 3
ER -