Abstract
VLSI neural circuits can play an important role in real-time image and signal processing. To make the neural computing hardware more powerful, compact and electrically programmable synapses are sorely needed. A floating-gate-based synapse structure fabricated by a standard double-polysilicon CMOS process is presented. Simulation and experimental results on conductance programmability and charge retention demonstrate the capability of this programmable synapse circuit. With this new programmable synapse circuit, a neural chip of 100 K synapses complexity can be constructed using one megabit static-RAM fabrication technologies.
| Original language | English |
|---|---|
| Pages (from-to) | 654-658 |
| Number of pages | 5 |
| Journal | IEEE Transactions on Circuits and Systems |
| Volume | 38 |
| Issue number | 6 |
| DOIs | |
| State | Published - 06 1991 |
| Externally published | Yes |
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