Analog MOS model for circuit simulation and benchmark test results

Robert C.H. Chang; Bing J. Sheu

Analog MOS model for circuit simulation and benchmark test results

Robert C.H. Chang^*
, Bing J. Sheu

^*Corresponding author for this work

University of Southern California

Research output: Contribution to journal › Conference article › peer-review

1 Scopus citations

Abstract

The BSIM plus MOS transistor model is developed for accurate and efficient analysis and simulation of submicron VLSI circuits. A compact parameter set is created to achieve high accuracy and continuity of the drain current and its derivatives in the subthreshold, triode and saturation regions of operation. Experimental results on individual transistors from deep submicron technologies are presented. Benchmark tests are performed to illustrate the salient features of the BSIM plus model.

Original language	English
Pages (from-to)	311-314
Number of pages	4
Journal	Proceedings - IEEE International Symposium on Circuits and Systems
Volume	1
State	Published - 1994
Externally published	Yes
Event	Proceedings of the 1994 IEEE International Symposium on Circuits and Systems. Part 3 (of 6) - London, England Duration: 30 05 1994 → 02 06 1994

Cite this

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title = "Analog MOS model for circuit simulation and benchmark test results",

abstract = "The BSIM plus MOS transistor model is developed for accurate and efficient analysis and simulation of submicron VLSI circuits. A compact parameter set is created to achieve high accuracy and continuity of the drain current and its derivatives in the subthreshold, triode and saturation regions of operation. Experimental results on individual transistors from deep submicron technologies are presented. Benchmark tests are performed to illustrate the salient features of the BSIM plus model.",

author = "Chang, \{Robert C.H.\} and Sheu, \{Bing J.\}",

year = "1994",

language = "英语",

volume = "1",

pages = "311--314",

journal = "Proceedings - IEEE International Symposium on Circuits and Systems",

issn = "0271-4310",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

note = "Proceedings of the 1994 IEEE International Symposium on Circuits and Systems. Part 3 (of 6) ; Conference date: 30-05-1994 Through 02-06-1994",

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T1 - Analog MOS model for circuit simulation and benchmark test results

AU - Chang, Robert C.H.

AU - Sheu, Bing J.

PY - 1994

Y1 - 1994

N2 - The BSIM plus MOS transistor model is developed for accurate and efficient analysis and simulation of submicron VLSI circuits. A compact parameter set is created to achieve high accuracy and continuity of the drain current and its derivatives in the subthreshold, triode and saturation regions of operation. Experimental results on individual transistors from deep submicron technologies are presented. Benchmark tests are performed to illustrate the salient features of the BSIM plus model.

AB - The BSIM plus MOS transistor model is developed for accurate and efficient analysis and simulation of submicron VLSI circuits. A compact parameter set is created to achieve high accuracy and continuity of the drain current and its derivatives in the subthreshold, triode and saturation regions of operation. Experimental results on individual transistors from deep submicron technologies are presented. Benchmark tests are performed to illustrate the salient features of the BSIM plus model.

UR - https://www.scopus.com/pages/publications/0028583837

M3 - 会议文章

AN - SCOPUS:0028583837

SN - 0271-4310

VL - 1

SP - 311

EP - 314

JO - Proceedings - IEEE International Symposium on Circuits and Systems

JF - Proceedings - IEEE International Symposium on Circuits and Systems

T2 - Proceedings of the 1994 IEEE International Symposium on Circuits and Systems. Part 3 (of 6)

Y2 - 30 May 1994 through 2 June 1994

ER -

Analog MOS model for circuit simulation and benchmark test results

Abstract

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