Analysis and architecture design for memory efficient parallel embedded block coding architecture in JPEG 2000

Lien Fei Chen*, Tai Lun Huang, Tzau Min Chou, Yeong Kang Lai

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

2 Scopus citations

Abstract

In this paper, a memory efficient parallel Embedded Block Coding (EBC) architecture with throughput enhancement in JPEG 2000 applications is proposed. In order to reduce the memory size, the memory-free algorithm for state variables in the context formation (CF) is proposed. The proposed algorithm eliminates the state variable memories by calculating three coding state variables (γp+1[n], σp+1[n], and πp[n]) on the fly. We also propose the stripe-column-based pass-parallel operation to perform three coding passes and four samples within the stripe-column concurrently, The FIFO architecture between the high throughput CF and the arithmetic encoder (AE) is also optimized by the pipelined sorter and the parallel-in parallel-out register file, Owing to the proposed high parallel CF, we propose a parallel and two-stage pipelined AE architecture to deal well with the context/decision (CX/D) pairs for three coding passes. The experimental results show that memory size of the proposed architecture is smaller than other familiar architectures, and the proposed architecture can process the loss-less coding about 50MSamples/sec at 100-MHz.

Original languageEnglish
Title of host publication2006 IEEE International Conference on Acoustics, Speech, and Signal Processing - Proceedings
PagesIII964-III967
StatePublished - 2006
Externally publishedYes
Event2006 IEEE International Conference on Acoustics, Speech and Signal Processing, ICASSP 2006 - Toulouse, France
Duration: 14 05 200619 05 2006

Publication series

NameICASSP, IEEE International Conference on Acoustics, Speech and Signal Processing - Proceedings
Volume3
ISSN (Print)1520-6149

Conference

Conference2006 IEEE International Conference on Acoustics, Speech and Signal Processing, ICASSP 2006
Country/TerritoryFrance
CityToulouse
Period14/05/0619/05/06

Fingerprint

Dive into the research topics of 'Analysis and architecture design for memory efficient parallel embedded block coding architecture in JPEG 2000'. Together they form a unique fingerprint.

Cite this