Analysis and architecture design of multi-transform architecture for H.264/AVC intra frame coder

Lien Fei Chen*, Kun Hsing Li, Chong Yu Huang, Yeong Kang Lai

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

6 Scopus citations

Abstract

Intra mode decision is the significant technique to improve the coding performance of H.264/AVC intra frame coder. Many intra frame coding architectures are proposed to achieve the high performance requirement by using the sum of absolute integer transformed differences (SAITD) mode decision instead of the sum of absolute transformed differences (SATD) mode decision. In this paper, we analyze the RD performance among the SAITD model and the SATD model, and validate that the SATD-based mode decision is better than SAITD model. In the light of the claim, an efficient multi-transform architecture with unique kernel is proposed to attempt deriving the coefficients of integer transforme and Hadamard transform simultaneously. Moreover, proposed architecture can be configured to perform all 4×4 transforms and 2×2 transform for luma and chroma coding. By utilizing our multi-transform architecture, H.264/AVC intra frame coder via the interleaved I4MB/16MB prediction schedule can be realized based on the SATD model.

Original languageEnglish
Title of host publication2008 IEEE International Conference on Multimedia and Expo, ICME 2008 - Proceedings
Pages145-148
Number of pages4
DOIs
StatePublished - 2008
Externally publishedYes
Event2008 IEEE International Conference on Multimedia and Expo, ICME 2008 - Hannover, Germany
Duration: 23 06 200826 06 2008

Publication series

Name2008 IEEE International Conference on Multimedia and Expo, ICME 2008 - Proceedings

Conference

Conference2008 IEEE International Conference on Multimedia and Expo, ICME 2008
Country/TerritoryGermany
CityHannover
Period23/06/0826/06/08

Keywords

  • H.264/AVC
  • Intra frame coder
  • Intra mode decision
  • Multi-transform architecture
  • VLSI

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