Abstract
An analytical delay model of a CMOS inverter is introduced for the first time which includes channel-length modulation, source-drain resistance and high-field effects. Calculations of the rise, fall and delay times show good agreement with SPICE simulations.
| Original language | English |
|---|---|
| Pages (from-to) | 408-410 |
| Number of pages | 3 |
| Journal | Electronics Letters |
| Volume | 28 |
| Issue number | 4 |
| DOIs | |
| State | Published - 02 1992 |
| Externally published | Yes |
Keywords
- Fieldeffect transistors
- Semiconductor devices and materials
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