Asymmetric driving current modification of CMOS LTPS-TFTs with HfO ₂ gate dielectric

In this paper, the asymmetric driving current I_drv modification of CMOS low-temperature poly-Si thin-film transistors (LTPS-TFTs) with HfO ₂ gate dielectric is demonstrated by the interfacial layer (IL) engineering of HfO₂/poly-Si interface. P-channel LTPS-TFT has much higher I_drv∼ 0.789 mA than the n-channel LTPS-TFT ∼ 0.274 mA under the same overdrive gate voltage. This asymmetric I_drv is due to the characteristics of field effect mobility μ_FE that p-channel LTPS-TFT has much higher hole μ_FE∼ 80.16 cm² Vs than the electron μ_FE&38.26;cm² V s of n-channel LTPS-TFT. The modification of HfO₂/poly-Si interface by O₂ plasma can enhance the electron μ_FE∼34% and reduce the hole μ_FE22.4%, resulting in balanced I_drv of CMOS LTPS-TFTs that n-channel device shows I_drv∼ 0.553 mA and p-channel device shows I_drv∼ 0.590 mA. In addition, the phonon scattering would also be improved by the IL growth and recovered to initial condition after IL removal. Consequently, the IL engineering of CMOS LTPS-TFTs with HfO₂ gate dielectric would be a good candidate for the application of system-on-panel or 3-D integrated circuits.