Automatic custom layout of analog ICs using constraint-based module generation

David J. Chen*, Bing J. Sheu

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

2 Scopus citations

Abstract

A systematic method for automatic custom layout of analog integrated circuits is presented. This method uses analog circuit recognition and critical net analysis techniques to derive proper layout constraints for analog circuit performance optimization. Constraint-driven analog floorplanning and routing techniques are developed to generate custom layouts which incorporate the layout constraints. This method can be applied to handle a wide variety of analog circuit modules as well as analog subsystems. Experimental results on CMOS operational amplifiers and a comparator are presented.

Original languageEnglish
Title of host publicationProceedings of the Custom Integrated Circuits Conference
PublisherPubl by IEEE
ISBN (Print)0780300157
StatePublished - 1991
Externally publishedYes
EventProceedings of the IEEE 1991 Custom Integrated Circuits Conference - San Diego, CA, USA
Duration: 12 05 199115 05 1991

Publication series

NameProceedings of the Custom Integrated Circuits Conference
ISSN (Print)0886-5930

Conference

ConferenceProceedings of the IEEE 1991 Custom Integrated Circuits Conference
CitySan Diego, CA, USA
Period12/05/9115/05/91

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