Abstract
The Berkeley Short-channel IGFET Model (BSIM), an accurate and computationally efficient MOS transistor model, and its associated characterization facility for advanced integrated-circuit design are described. Both the strong-inversion and weak-inversion components of the drain-current expression are included. In order to speed up the circuit-simulation execution time, the dependence of the drain current on the substrate bias has been modeled with a numerical approximation. This approximation also simplifies the transistor terminal charge expressions. The charge model was derived from its drain-current counterpart to preserve consistency of device physics. Charge conservation is guaranteed in this model. The model parameters are extracted by an automated parameter-extrac-tion program. Use of this model to analyze device characteristics from several NMOS and CMOS processes has resulted in good agreement between measured and modeled results for transistors with effective channel lengths as small as 1 μm. Enhancements for submicrometer applications have been pointed out.
Original language | English |
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Pages (from-to) | 558-566 |
Number of pages | 9 |
Journal | IEEE Journal of Solid-State Circuits |
Volume | 22 |
Issue number | 4 |
DOIs | |
State | Published - 08 1987 |
Externally published | Yes |